The semiconductor integrated circuit (IC) industry has experienced rapid growth. In the course of IC evolution, functional density (i.e., the number of interconnected devices per chip area) has generally increased while geometry size (i.e., the smallest component (or line) that can be created using a fabrication process) has decreased. This scaling down process generally provides benefits by increasing production efficiency and lowering associated costs. Such scaling down has also increased the complexity of processing and manufacturing ICs and, for these advances to be realized, similar developments in IC manufacturing are needed. For example, wafer surface planarization has become critical. Conventional methods for ensuring wafer surface uniformity (both within-wafer uniformity and wafer-to-wafer uniformity) focus on achieving mean target thickness control. However, as device scaling continues, variations across the wafer surfaces are becoming significant, presenting a need for closely controlled target thickness and surface profile uniformity. Although existing approaches have been generally adequate for their intended purposes, they have not been entirely satisfactory in all respects.